integrated device technology, inc. military and commercial temperature ranges april 1994 1994 integrated device technology, inc. 7.23 dsc-4620/3 high-performance cmos bus transceivers the idt logo is a registered trademark of integrated device technology, inc. fast is a trademark of national semiconductor co. features: equivalent to amd? am29861-64 bipolar registers in pinout/function, speed and output drive over full tempera- ture and voltage supply extremes idt54/74fct861a/863a equivalent to fast ? speed idt54/74fct861b/863b 25% faster than fast high-speed symmetrical bidirectional transceivers ? ol = 48ma (commercial) and 32ma (military) clamp diodes on all inputs for ringing suppression cmos power levels (1mw typ. static) ttl input and output level compatible cmos output level compatible substantially lower input current levels than amd? bipolar am29800 series (5 m a max.) product available in radiation tolerant and radiation enhanced versions military product compliant to mil-std-883, class b description: the idt54/74fct800 series is built using an advanced dual metal cmos technology. the idt54/74fct860 series bus transceivers provide high-performance bus interface buffering for wide data/address paths or buses carrying parity. the idt54/74fct863 9-bit transceivers have nand-ed output enables for maximum control flexibility. all of the idt54/74fct800 high-performance interface family are designed for high-capacitance load drive capability while providing low-capacitance bus loading at both inputs and outputs. all inputs have clamp diodes and all outputs are designed for low-capacitance bus loading in the high- im- pedance state. functional block diagrams idt54/74fct861 idt54/74fct863 t 0 t 1 oer t 9 - r 0 r 1 oet r 9 - idt54/74fct861a/b idt54/74fct863a/b 1 2610 drw 01 t 0 t 1 oer t 8 - r 0 r 1 oet r 8 - oet 12 oer 12 product selector guide device 10-bit 9-bit non-inverting idt54/74fct861 idt54/74fct863
idt54/74fct861a/b, idt54/74fct863a/b high-performance cmos bus transceivers military and commercial temperature ranges 7.23 2 pin configurations idt54/74fct861 10-bit transceivers 5 6 7 8 9 10 11 12 gnd oer r 0 r 1 1 2 3 4 24 23 22 21 20 19 18 17 vcc 16 15 14 13 p24-1, d24-1, e24-1 & so24-2 t 0 r 2 r 3 r 4 r 5 r 6 t 1 t 2 t 3 t 4 t 5 t 6 t 7 r 7 r 8 t 8 1 oer 2 oet 2 oet 1 dip/cerpack/soic top view 2610 drw 02 5 6 7 8 9 10 11 l28-1 25 24 23 22 21 20 19 index r 2 r 3 r 4 r 5 r 6 r 7 nc vcc t 0 t 1 nc nc nc t 2 t 3 t 4 t 5 t 6 t 7 r 0 r 1 gnd r 8 t 8 oer oer 2 oet 1 oet 2 12 13 14 15 16 17 18 432 1 28 27 26 logic symbols lcc top view 5 6 7 8 9 10 11 12 gnd oer r 0 r 1 1 2 3 4 24 23 22 21 20 19 18 17 vcc 16 15 14 13 p24-1, d24-1, e24-1 & so24-2 t 0 r 2 r 3 r 4 r 5 r 6 t 1 t 2 t 3 t 4 t 5 t 6 t 7 r 7 r 8 r 9 t 8 t 9 oet lcc top view dip/cerpack/soic top view 5 6 7 8 9 10 11 l28-1 25 24 23 22 21 20 19 index r 2 r 3 r 4 r 5 r 6 r 7 nc vcc t 0 t 1 nc nc nc t 2 t 3 t 4 t 5 t 6 t 7 r 0 r 1 gnd r 8 r 9 t 8 t 9 oet oer 12 13 14 15 16 17 18 432 1 28 27 26 idt54/74fct863 9-bit transceivers idt54/74fct863 idt54/74fct861 t r 10 10 oet oer oet 1 oet 2 2610 drw 03 t r 99 oer 1 oer 2
idt54/74fct861a/b, idt54/74fct863a/b high-performance cmos bus transceivers military and commercial temperature ranges 7.23 3 pin description name i/o description idt54/74fct861 oer i when low in conjunction with oet high activates the receive mode. oet i when low in conjunction with oer high activates the transmit mode. r i i/o 10-bit receive input/output. t i i/o 10-bit transmit input/output. idt54/74fct863 oer i i when low in conjunction with oet i high activates the receive mode. oet i i when low in conjunction with oer i high activates the transmit mode. r i i/o 9-bit receive input/output. t i i/o 9-bit transmit input/output. 2610 tbl 01 capacitance (t a = +25 c, f = 1.0mhz) symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 6 10 pf c i/o i/o capacitance v out = 0v 8 12 pf note: 2610 tbl 04 1. this parameter is guaranteed by characterization but not tested. absolute maximum ratings (1) symbol rating commercial military unit v term (2) terminal voltage C0.5 to +7.0 C0.5 to +7.0 v with respect to gnd v term (3) terminal voltage C0.5 to v cc C0.5 to v cc v with respect to gnd t a operating 0 to +70 C55 to +125 c temperature t bias temperature C55 to +125 C65 to +135 c under bias t stg storage C55 to +125 C65 to +150 c temperature p t power dissipation 0.5 0.5 w i out dc output current 120 120 ma notes: 2610 tbl 03 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. no terminal voltage may exceed v cc by +0.5v unless otherwise noted. 2. inputs and v cc terminals only. 3. outputs and i/o terminals only. function table (1) idt54/74fct861/863 (non-inverting) inputs outputs oet oet oer oer r i t i r i t i function l h l n/a n/a l transmitting l h h n/a n/a h transmitting h l n/a l l n/a receiving h l n/a h h n/a receiving h h x x z z high z note: 2610 tbl 02 1. h = high, l = low, z = high impedance, x = dont care, n/a = not applicable.
idt54/74fct861a/b, idt54/74fct863a/b high-performance cmos bus transceivers military and commercial temperature ranges 7.23 4 dc electrical characteristics over operating range following conditions apply unless otherwise specified: v lc = 0.2v, v h c = v cc C 0.2v commercial: t a = 0 c to +70 c, v cc = 5.0v 5%; military: t a = C55 c to +125 c, v cc = 5.0v 10% symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high level guaranteed logic high level 2.0 v v il input low level guaranteed logic low level 0.8 v i ih input high current v cc = max. v i = v cc 5 m a (except i/o pins) v i = 2.7v 5 (4) i il input low current v i = 0.5v C5 (4) m a (except i/o pins) v i = gnd C5 i ih input high current v cc = max. v i = v cc 15 (i/o pins only) v i = 2.7v 15 (4) i il input low current v i = 0.5v C15 (4) (i/o pins only) v i = gnd C15 v ik clamp diode voltage v cc = min., i n = C18ma C0.7 C1.2 v i os short circuit current v cc = max. (3) , v o = gnd C75 C120 ma v oh output high voltage v cc = 3v, v in = v lc or v hc , i oh = C32 m av hc v cc v v cc = min. i oh = C300 m av hc v cc v in = v ih or v il i oh = C15ma mil. 2.4 4.3 i oh = C24ma coml. 2.4 4.3 v ol output low voltage v cc = 3v, v in = v lc or v hc , i ol = 300 m a gnd v lc v v cc = min. i ol = 300 m a gnd v lc (4) v in = v ih or v il i ol = 32ma mil. (5) 0.3 0.5 i ol = 48ma coml. (5) 0.3 0.5 notes: 2610 tbl 05 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable device type. 2. typical values are at v cc = 5.0v, +25 c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the short circuit test should not exceed one second. 4. this parameter is guaranteed but not tested. 5. these are maximum i ol values per output, for 10 outputs turned on simultaneously. total maximum i ol (all outputs) is 480ma for commercial and 320ma for military. derate i ol for number of outputs exceeding 10 turned on simultaneously.
idt54/74fct861a/b, idt54/74fct863a/b high-performance cmos bus transceivers military and commercial temperature ranges 7.23 5 power supply characteristics v lc = 0.2v; v hc = v cc C 0.2v symbol parameter test conditions (1) min. typ. (2) max. unit i cc quiescent power v cc = max. 0.2 1.5 ma supply current v in 3 v hc ; v in v lc d i cc quiescent power supply v cc = max. 0.5 2.0 ma current ttl inputs high v in = 3.4v (3) i ccd dynamic power supply current (4) v cc = max., outputs open v in 3 v hc 0.15 0.25 ma/ oer or oet = gnd v in v lc mhz one input toggling 50% duty cycle i c total power supply current (6) v cc = max., outputs open v in 3 v hc 1.7 4.0 ma f i = 10mhz v in v lc 50% duty cycle (fct) oer or oet = gnd v in = 3.4v 2.0 5.0 one bit toggling v in = gnd v cc = max., outputs open v in 3 v hc 3.2 6.5 (5) f i = 2.5mhz v in v lc 50% duty cycle (fct) oer or oet = gnd v in = 3.4v 5.2 14.5 (5) eight bits toggling v in = gnd notes: 2610 tbl 06 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable device type. 2. typical values are at v cc = 5.0v, +25 c ambient. 3. per ttl driven input (v in = 3.4v); all other inputs at v cc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the i cc formula. these limits are guaranteed but not tested. 6. i c = i quiescent +i inputs + i dynamic i c = i cc + d i cc d h n t + i ccd (f cp /2 + f i n i ) i cc = quiescent current d i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) f i = input frequency n i = number of inputs at f i all currents are in milliamps and all frequencies are in megahertz.
idt54/74fct861a/b, idt54/74fct863a/b high-performance cmos bus transceivers military and commercial temperature ranges 7.23 6 switching characteristics over operating range notes: 2610 tbl 07 1. see test circuits and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. this condition guaranteed but not tested. fct861a/863a fct861b/863b com'l. mil. com'l. mil. symbol parameter condition (1) min . (2) max. min . (2) max. min . (2) max. min . (2) max. unit t plh t phl propagation delay r i to t i or t i to r i c l = 50pf r l = 500 w 1.5 8.0 1.5 9.0 1.5 6.0 1.5 6.5 ns fct861/863 c l = 300pf (3) r l = 500 w 1.5 15.0 1.5 17.0 1.5 13.0 1.5 14.0 t pzh t pzl output enable time oet to t i or oer to r i c l = 50pf r l = 500 w 1.5 12.0 1.5 13.0 1.5 8.0 1.5 9.0 ns c l = 300pf (3) r l = 500 w 1.5 20.0 1.5 22.0 1.5 15.0 1.5 16.0 t phz t plz output disable time oet to t i or oer to r i c l = 5pf (3) r l = 500 w 1.5 9.0 1.5 9.0 1.5 6.0 1.5 7.0 ns c l = 50pf r l = 500 w 1.5 10.0 1.5 10.0 1.5 7.0 1.5 8.0
idt54/74fct861a/b, idt54/74fct863a/b high-performance cmos bus transceivers military and commercial temperature ranges 7.23 7 pulse generator r t d.u.t. v cc v in c l v out 50pf 500 w 500 w 7.0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v data input timing input asynchronous control preset clear etc. synchronous control t su t h t rem t su t h high-low-high pulse low-high-low pulse t w 1.5v 1.5v same phase input transition 3v 1.5v 0v 1.5v v oh t plh output opposite phase input transition 3v 1.5v 0v t plh t phl t phl v ol control input 3v 1.5v 0v 3.5v 0v output normally low output normally high switch closed switch open v ol 0.3v 0.3v t plz t pzl t pzh t phz 3.5v 0v 1.5v 1.5v enable disable v oh preset clear clock enable etc. test circuits and waveforms test circuits for all outputs set-up, hold and release times pulse width switch position test switch open drain disable low closed enable low all other tests open definitions: 2610 tbl 08 c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator. enable and disable times propagation delay 2610 drw 03 notes: 1. diagram shown for input control enable-low and input control disable- high 2. pulse generator for all pulses: rate 1.0mhz; t f 2.5ns; t r 2.5ns
idt54/74fct861a/b, idt54/74fct863a/b high-performance cmos bus transceivers military and commercial temperature ranges 7.23 8 ordering information xx temperature range xxxx device type x package x process blank b commercial mil-std-883, class b p d e l so plastic dip cerdip cerpack leadless chip carrier small outline ic -55 c to +125 c 0 to +70 c 2610 drw 04 54 74 fct idt 861a 863a 861b 863b 10-bit non-inverting transceiver 9-bit non-inverting transceiver
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